This group makes the special memory chips that sit right next to AI processors and feed them data fast enough to keep them busy. The product is HBM (High Bandwidth Memory) — a tower of ordinary memory chips (DRAM dies) stacked vertically and wired together with thousands of tiny vertical connections (through-silicon vias, or TSVs) so it moves data several times faster than the normal memory in a laptop or server. Every modern AI accelerator (the NVIDIA, AMD, and custom hyperscaler chips that train and run AI models) needs several HBM stacks bolted right beside it. Only three companies on Earth make HBM at scale: SK Hynix, Samsung, and Micron (MU). The same three, plus a couple of others, also make the conventional DRAM and NAND flash (the bulk storage and working memory) that fill out a server. The reason this matters: an AI chip is only as useful as the memory feeding it, so HBM is a hard physical bottleneck on how much AI compute the world can actually stand up.
Demand is running ahead of supply today, and the prior model's base case keeps the product short by roughly 10-13% through 2028, possibly longer under an AGI-driven demand path. What limits supply is not just chip-making but the slow, low-yield steps of stacking, packaging, and getting each new generation re-qualified by the customer — capacity that takes an estimated 18-24 months to add. In money terms: Micron's most recent reported quarter (FQ2 2026) showed a ~75% non-GAAP gross margin (gross profit as a share of revenue) and revenue nearly tripled year-over-year. Those are reported facts at what the prior report itself frames as a cyclical peak; the arithmetic the reader can do is that today's price buys exposure to peak-margin earnings, and what these businesses earn at the next trough is a separate, unsettled number. The reader judges what that is worth.
Source: 500-stocks semiconductors scan (Memory: HBM, DRAM & NAND), prior "HBM Supply/Demand Model for Micron" report (last updated 2026-05-01), and "HBM Capacity Timeline" capacity note (April 23, 2026).
The core product is an HBM stack: typically 8 or 12 memory dies stacked on top of a logic/buffer die at the bottom, sold as one component that gets packaged right next to an AI processor. The natural unit is gigabytes (GB) of memory, or equivalently the number of stacks. The prior report standardizes on "E24" = one 24GB HBM3E-equivalent stack, so that an 8-high 24GB stack counts as 1.0 and a 12-high 36GB stack counts as 1.5. One NVIDIA Blackwell-class GPU carries roughly 8-12 of these stacks; an AMD MI350 carries about 12.
How the cash actually comes in: these companies convert silicon wafers into finished stacks and sell them to chip makers (NVIDIA, AMD) and to the cloud giants building their own chips. They earn money two ways at once — more units (every new AI accelerator needs HBM) and higher price per unit. HBM sells for an estimated 5-7x the price per gigabyte of ordinary DDR5 memory because the stacking, TSVs, and packaging are hard and low-yield. est. Per the capacity note's price estimates, an 8-high 24GB stack runs roughly $300-350 and a 12-high 36GB stack roughly $500-600, versus about $2-3 per GB for commodity DDR5. est. The price per stack is the stack's average selling price (ASP — the average price a unit actually sells for). Because the customer designs its accelerator around a specific supplier's stack and then has to re-qualify any new supplier — an estimated 18-33 month process for the newest HBM4 generation, where the bottom logic die is custom-built at a foundry to the customer's spec — the relationship is becoming sticky, more like a foundry contract than a quarter-to-quarter commodity buy. That stickiness is, per the prior report's reasoning, what lets the makers hold price.
Source: HBM Capacity Timeline note (pricing, unit definitions), prior Micron HBM model (E24 unit, per-GPU stack counts, switching-cost analysis).
Today the world is buying essentially all the HBM that can be made — every maker reports 2026 capacity sold out. contracted In dollar terms the prior model and capacity note put 2026 industry HBM revenue at roughly $54-66B, rising to roughly $76-90B in 2027 and $90-108B in 2028 on a forecast basis. est. forecast In unit terms the model's base case is roughly 260M E24 stacks of demand in 2026, rising to ~387M in 2027 and ~565M in 2028. forecast
The buyers split into three buckets. NVIDIA is the largest single visible buyer (its Blackwell/Blackwell Ultra GPUs each carry 8-12 stacks). AMD is smaller but every chip is HBM-heavy. The swing factor is the custom-chip programs at the cloud giants — Google TPU, Amazon Trainium, Microsoft Maia, Meta MTIA, and Broadcom-designed ASICs (ASIC = a chip custom-built for one job, here AI inference/training, rather than a general-purpose GPU). The prior model flags this last bucket as where forecasts can be wrong by 100M+ stacks: if every hyperscaler scales its own inference silicon, that demand stacks on top of NVIDIA's rather than replacing it.
Reasoning from the premise that AGI is arriving: the demand driver is not just training ever-bigger models but running them — agents executing trillions of tokens per day, enterprises deploying inference at full scale, models doing continuous reinforcement learning. Memory bandwidth is the binding constraint on inference, so rising compute demand pulls HBM demand up roughly in step. The honest bear case inside this premise is algorithmic efficiency (mixture-of-experts and other techniques that activate only part of a model per token, lower-precision math like FP4, and KV-cache compression) cutting the memory needed per unit of intelligence. The prior report's arithmetic is that token-volume growth (estimated ~10x/yr) outpaces efficiency gains (estimated ~3x/yr), so on those assumptions HBM demand still grows even with aggressive efficiency, just more slowly. est.
✓ VERIFIED — the following figures were confirmed from primary sources after initial publication:
Source: prior Micron HBM model (demand buckets, E24 totals, AGI/efficiency reasoning), HBM Capacity Timeline note (revenue forecasts, sold-out status), 500-stocks scan (~100%/yr growth, stacks per GPU).
Current industry capacity is estimated at roughly 270-320K HBM wafers per month, which the prior model converts to about 203-240M E24 stacks per year. est. The estimated split (Q1 2026): SK Hynix ~130-150K wafers/mo (the leader), Samsung ~90-110K, Micron ~50-60K. est.
All three are spending tens of billions to expand, but the timing is the catch — big new capacity is mostly a 2027-2028 event, not a 2026 one:
The real bottleneck is not raw chip-making — it is qualified supply (wafers that have actually passed every step and been approved by the customer). A wafer is not sellable HBM until its dies survive thinning to roughly 30-40 microns, TSV processing, stacking, thermal testing, advanced packaging, and customer qualification. Each HBM stack also consumes the equivalent of an estimated 2.5-3x the conventional-DRAM bit output of a normal wafer, so diverting wafers to HBM tightens ordinary DRAM too. There is a second, external bottleneck: TSMC's CoWoS packaging (the step that physically integrates HBM next to the GPU) is estimated at only ~40-50K wafers/month in 2026, which the prior model argues actually caps how many new accelerators can ship through 2027 est. — meaning through 2027 the binding constraint on accelerator output is CoWoS, with HBM-die supply tightness showing up as allocation behavior rather than a price collapse. From 2028+ the model argues the constraint shifts back to HBM die itself.
Estimated market-share structure (by HBM revenue, Q1 2026): SK Hynix ~53-55% (down from ~62% mid-2025), Samsung ~25-28%, Micron ~18-22% (targeting 24%+ by year-end). est. A fourth player, China's CXMT, is the only credible new entrant but is on older HBM2/HBM3 generations and blocked by US export controls from the leading-edge tools needed to compete for NVIDIA/AMD sockets — so the prior report characterizes it as a modest volume subtractor for the Chinese domestic market rather than a factor in top-end pricing through about 2030.
Source: HBM Capacity Timeline note (wafer capacity, share, expansion projects, CoWoS), prior Micron HBM model (qualified-supply argument, CoWoS gating math, CXMT analysis), 500-stocks scan (three-maker structure, sold out through 2027).
Putting the two sides together, the product is short today and the prior base case keeps it short through 2028. The evidence of shortness is concrete and largely contracted: all three makers report 2026 sold out, SK Hynix says HBM is sold out for all of 2026 with visibility into 2027, and HBM pricing is firm. SK Group's chairman said at GTC in March 2026 that the wafer shortage could last until 2030. The price signal — HBM holding an estimated 5-7x per-GB premium over commodity DRAM, and Micron's reported non-GAAP gross margin moving from 37.9% (FQ2 2025) to 74.9% (FQ2 2026) — is what a sold-out market looks like in cash terms.
| Year | Supply (base, M E24) | Demand (base, M E24) | Base gap | Gap / demand | Read |
|---|---|---|---|---|---|
| 2026 | 225 | 260 | -35 | ~-13% | Short — pricing power persists in the model est. |
| 2027 | 350 | 387 | -37 | ~-10% | Still short unless demand disappoints forecast |
| 2028 | 500 | 565 | -65 | ~-12% | Decision year — bear case oversupplies, AGI case stays short forecast |
When could it flip to oversupply? The prior report's earliest realistic window for balance is late 2027 to mid-2028, and only if demand stops accelerating — which the AGI premise argues against. The prior report's decision rule: if 2027 demand stays above ~375M E24 the shortage holds; if 2027 demand falls below ~320M E24 while supply ramps toward ~390M E24, the shortage story is breaking. The swing variables to watch are custom-ASIC unit volumes (the biggest demand uncertainty), Samsung's yield and pricing behavior (the biggest supply-side uncertainty, since aggressive Samsung pricing to regain share could compress everyone's margins), and HBM4 yields (poor yields mean new capacity does not become useful supply quickly).
Source: prior Micron HBM model (gap table, decision rule, swing variables), HBM Capacity Timeline note (sold-out language, balance window, Chey GTC 2026 comment).
The money concentrates in the three HBM makers; the NAND/storage names in the same scan section are adjacent (they store the data the AI uses) but are not real HBM players. Company sizes below are general-knowledge estimates and not live-verified; the reported quarterly revenue figures are from filings.
| Company | What it makes | Exposure to HBM | Rough size | Position / edge |
|---|---|---|---|---|
| SK Hynix (HXSCL) | HBM, DRAM, NAND | High — HBM is its standout profit driver; ~$30-35B HBM revenue 2026E est. | ~$15B+ revenue in Q1 2026 (reported) contracted | Share leader (~53-55% est.); MR-MUF stacking process cited as a thermal/yield edge; ~72% operating margin reported |
| Samsung (SSNLF) | HBM, DRAM, NAND, foundry, consumer electronics | Low-to-medium of total company — HBM is a small slice of a giant conglomerate, but the catch-up swing factor; ~$14-18B HBM revenue 2026E est. | Largest of the three by total company size (large diversified electronics group) | ~25-28% share est.; largest 2026 capacity add (~50% est.); aiming for HBM4-first to regain share; history of missing timelines |
| Micron (MU) | HBM, DRAM, NAND | Highest pure-play exposure of the three as a US-listed memory company; HBM ~$10-13B of FY2026 revenue est. | ~$23.86B revenue in FQ2 2026 (reported) contracted | Smallest HBM share (~18-22% est.) but growing fastest in percentage terms; 4 qualified customers; cited 1-beta/1-gamma node (the manufacturing-process generation) die-size edge |
| Western Digital (WDC), Seagate (STX) | NAND flash / hard drives (storage, not HBM) | None to HBM — adjacent storage demand only | Mid-cap storage makers est. | Exposed to AI data growth but do not make HBM; not part of the HBM gap |
| CXMT (private, China) | DRAM, early HBM2/HBM3 | Low — lagging generations, domestic-only | Not US-listed | Only credible new entrant; export-control-capped; not characterized as a factor in top-end HBM4 pricing through ~2030 |
Source: 500-stocks scan (company list, tickers), HBM Capacity Timeline note (share, HBM revenue by company, margins), prior Micron HBM model (Micron FQ2 2026 reported figures, qualified-customer count).
The figures below mix hard reported company numbers (revenue, margins) with not-live-verified market-size estimates; the two are labelled separately. The reported owner economics, at what the prior report itself calls a cyclical peak: Micron's FQ2 2026 showed company revenue of $23.86B (versus the year-ago $8.05B) at a 74.9% non-GAAP gross margin (versus 37.9% a year earlier), with its Cloud Memory unit at $7.75B revenue / 74% gross margin, and management guiding the next quarter to roughly $33.5B revenue at about 81% gross margin. contracted SK Hynix reported a record Q1 2026 at roughly $15B+ revenue and about 72% operating margin. contracted The neutral arithmetic: in a sold-out market, roughly three of every four dollars of HBM/data-center memory revenue is dropping to gross profit. Whether that persists is the open question, not a settled fact.
The money-in/money-out shape of this group is high-capex (capex = the cash spent up front on fabs and equipment). Each maker is spending in the rough range of $10-20B+ per year on capacity: Micron FY2026 capex guided at roughly $14-16B, SK Hynix roughly $12-13B+ for 2025 with more in 2026 plus a $16B Yongin cluster over several years, and Samsung's memory/HBM capex estimated at roughly $15-20B. est. So owner cash (free cash flow = operating cash minus capex) only shows up to the extent margins cover that heavy spend. On the reported numbers they currently do, but this is the most capital-intensive corner of the AI build-out, the opposite of a capital-light software business — a fact the reader can weigh.
Per-unit, the arithmetic from the prior model: Micron's estimated ~50-60K HBM wafers/month implies roughly 38-45M E24/year, which at a blended ASP (average selling price per stack) of about $250-300 per E24 is roughly $10-13.5B of annualized HBM revenue capacity — consistent with the capacity note. est. On valuation multiples (what you pay in market value per $1 of revenue or earnings), the prior reports deliberately do not pin down current price-to-earnings or price-to-sales multiples, and live quotes were unavailable here, so no specific multiple is stated. The load-bearing, opinion-free point the reader can act on: because margins are at a cyclical peak, a trailing-earnings multiple looks lowest precisely when earnings are highest, so the number that determines what today's price actually buys is trough earnings, not peak earnings. The prior report notes memory gross margins have historically swung from single-digit/negative levels up to roughly 60%. Where in that range the next trough lands is the variable the reader must form a view on.
Source: prior Micron HBM model (Micron FQ2 2026 reported figures, per-unit revenue arithmetic, trough-margin framing), HBM Capacity Timeline note (SK Hynix Q1 2026 margins, capex estimates). Market-cap/multiple figures intentionally not stated — not live-verified.
Where a company-level deep-dive is most informative, stated factually:
Source: prior Micron HBM model (base-die diligence priority, purest-play framing), HBM Capacity Timeline note (SK Hynix leader / Samsung catch-up characterization).
What was used:
Hard (grounded in filings / the provided notes): the three-maker HBM structure; Micron FQ2 2026 reported revenue ($23.86B), gross margin (74.9%), and FQ3 guide (~$33.5B revenue, ~81% margin); SK Hynix Q1 2026 record quarter and ~72% operating margin; the all-three sold-out-2026 status; the $9.6B Hiroshima and $16B Yongin announced investments.
Approximate and not live-verified (estimates / forecasts): all market-size figures ($54-108B industry HBM revenue); the ~100%/yr demand growth; the ~5-7x per-GB pricing premium; per-stack and per-E24 price estimates ($250-310 blended ASP, $300-600 per stack); every E24 unit total and the supply/demand gap percentages; the market-share bands (SK Hynix ~53-55% / Samsung ~25-28% / Micron ~18-22%); all 2027-2028 projections; capex magnitudes; and any valuation multiple (deliberately not stated). Live web retrieval was unavailable when this was built; memory makers do not disclose exact HBM wafer starts, average selling prices, or order volumes, so the forward numbers are triangulated model outputs, not a disclosed order book.
Source: as listed above. No live quotes, filings, or web data were retrieved during construction of this fact sheet.